April 18th, 2019 ~ by admin

Tiered up for 3D-FPGAs: The Story of the Tier Logic FPGA-ASIC

100K LUT Tier Logic FPGA TL1F100 on the left and TL1A100 ASIC on the right

This is the CPU Shack Museum, but occasionally I find a chip thats not really a CPU but is of such interest that I keep it, especially if its novel and relatively unknown.  So today we have a bit of the story of Tier Logic.  Tier Logic set out to make FPGA (Field Programmable Gate Arrays) better, and to make the transition (or choice) between them and ASICs (Application Specific Integrated Circuit) easier.

FPGA’s are great for smaller product runs, they are configurable, and relatively easy to reprogram, designs can easily be updated/tested with no additional cost.  FPGA’s however are large in terms of die area, power budgets, and cost per chip.  ASIC’s on the other hand, take longer to develop (re-spinning silicon every time an error is found) and have a much larger upfront cost, as well as an entirely different tool chain to design with. They are however smaller, use less power, and once the design is finalized, the per unit cost is very low.  This presents a dilemma in design, which should one choose for a project?  What if you didn’t have to choose? What if you could have the flexibility of an FPGA, and the benefits of an ASIC all at once?

It is exactly this that Tier Logic set out to do.  Tier Logic was founded by FPGA process-technology pioneer Raminda Madurawe (from Altera) in 2003 and was led by Doug Laird, a founder of Transmeta (famous for the Crusoe VLIW processors).  For 7 years they worked to design a solution, working in what is known as ‘stealth mode.’  Stealth mode is a way for companies to work quietly, with little to know PR, until they have a product ready to release.  Often the company exists but is completely unknown to outsiders.  This has some definite benefits, there is no constant barrage of having to answer/report to the media and others, and their is less risk of someone seeing what you are doing and trying to beat you to market to it.  Seven years, however, is a very long time to be in stealth mode, and the reason for this is Tier Logic not only was inventing a new style of FPGA/ASIC, they had to develop a new silicon process to make it work.

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March 31st, 2019 ~ by admin

CPU of the Day: CS603RMP-200 PowerPC 603r Goes Golden

Chip Supply Inc. CS603RMP-200 – 2005 Production Miltemp PowerPC 603r

The original PowerPC 603 was released way back in 1994, made on a 0.5u process and running at 75MHz.  A year later, the greatly improved PowerPC 603e was released, made on the same process, but supporting speeds of up to 200MHz.  It doubled the L1 caches to 16K each (for Instruction and Data) and introduced some Power Down modes useful for mobile and other low power applications.  A die shrink to 0.5u allowed speeds of up to 300MHz.

The 603e was available in both BGA  and cerquad packages, which worked for most applications.  But what if you wanted something a bit different?  What if your application needed something a bit more robust.  This is where packaging and die specialist companies come into play.  Motorola/IBM had no desire to make short runs of oddball packages and/or dies screened for higher end use.  Other companies however, did…

Motorola MPC603ERX100LN – 2000 vintage PowerPC 603e

Chip Supply Inc. was founded back in 1978 in Orlando, FL  just for this purpose.  Chip Supply provided die testing and packaging services for many different companies.  They also provided a service known as ‘die banking’ and just as the name implies, this involves collection and storing wafers and/or dies for future use.  This helped with end-of-life products especially.  As manufacturers slowed, changed, or stopped production of a device, dies for it could be made available through firms like Chip Supply.

In 1997 Chip Supply Inc. signed an agreement with Motorola giving them access to bare dies and known good dies for the PowerPC 603e, MPC106/7 PCI Bridge, and the MC68000 line.  This allowed Chip Supply to source dies from Motorola, screen them for higher spec (Military and Industrial temp typically).  Motorola had a similar agreement with Thomson-CSF (later this line was acquired by Atmel) who did the same thing, but also made radiation tested parts for space use (notably used on the original Iridium satellite constellation).

16×16 PGA in a 50mm package. Pins are 6mm long (twice as long as a Socket 7 Pentium)

The CS603RMP-200 is a 200MHz PowerPC 603r processor.  The 603r is nearly identical to the 603e, but allows for lower voltages (2.5V) and is made on a 0.29u process.  Chip Supply packaged this in a 16×16 CPGA package that is 50mmx50mm (nearly 2 inches square). It includes a large, gold plated heatspreader thats about the same size as a typical BGA PowerPC 603e.  These use original Motorola dies, upcreened to Military temperature (-55-125C) and tested to run at 200MHz.  The large heatspreader and ceramic package allow for better thermal management, and better mechanical support.  Thermal cycling and vibrations often result in BGA connection failures (a familiar problem on some game consoles in the early 2000’s), something a properly mounted PGA chip is much more tolerant of.

Chip Supply Inc. was acquired by Micross Components in 2010, a company that formed in 1998, and provided the same services with the addition of radiation testing. It appears that this was the end of the line for the entire PowerPC line by Chip Supply, though its likely that custom orders could be fulfilled for sometime after the acquisition.   Someday perhaps we’ll find out what applications the PGA PowerPC 603s were used in.

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March 1st, 2019 ~ by admin

CPU of the Day: UTMC UT69R000: The RISC with a Trick

UTMC UT69R000-12WCC 12MHz 16-bit RISC -1992

We have previously covered several MIL-STD-1750A compatible processors as well as the history and design of them.  As a reminder the 1750A standard is an Instruction Set Architecture, specifying exactly what instructions the processor must support, and how it should process interrupts etc.  It is agnostic, meaning it doesn’t care. how that ISA is implemented, a designers can implement the design in CMOS, NMOS, Bipolar, or anything else needed to meet the physical needs, as long as it can process 1750A instructions.

Today we are going to look at the result of that by looking at a processor that ISN’T a 1750A design.  That processor is a 16-bit RISC processor originally made by UTMC (United Technologies Microelectronics Center).  UTMC was based in Colorado Springs, CO, and originally was formed to bring a semiconductor arm to United Technology, including their acquisition of Mostek, which later was sold to Thomson of France. After selling Mostek, UTMC focussed on the military/high reliability marked, making many ASICs and radhard parts including MIL-STD-1553 bus products and 1750A processors.  The UT69R000 was designed in the late 1980’s for use in military and space applications and is a fairly classic RISC design with 20 16-bit registers, a 32-bit Accumulator, a 64K data space and a 1M address space.  Internally it is built around a 32-bit ALU and can process instructions in 2 clock cycles, resulting in 8MIPS at 16MHz.  The 69R000 is built on a 1.5u twin-well CMOS process that is designed to be radiation hardened (this isn’t your normal PC processor afterall).  In 1998 UTMC sold its microelectronics division to Aeroflex, and today, it is part of the English company Cobham.

UTMC UT1750AR – 1990 RISC based 1750A Emulation

UTMC also made a 1750A processor, known as the UT1750AR, and if you might wonder why the ‘R’ is added at the end.  The ‘R’ denotes that this 1750A has a RISC mode available.  If the M1750 pin is tied high, the processor works as a 1750A processor, tied low, it runs in 16-bit RISC mode.  How is this possible? Because the UT1750AR is a UT69R000 processor internally.  Its the same die inside the package, and the pinout is almost the same (internally it may be but that’s hard to tell).  In order for the UT1750AR to work as a 1750A it needs an 8Kx16 external ROM.  This ROM (supplied by UTMC) includes translations from 1750A instructions to RISC macro-ops, not unlike how modern day processors handle x86.  The processor receives a 1750A instruction, passes it to the ROM for translation, and then processes the result in its native RISC instructions.   There is of course a performance penalty, processing code this way results in 1750A code execution rates of 0.8MIPS at 16MHz, a 90% performance hit over the native RISC.  For comparison sake, the Fairchild F9450 processor, also a 1750A compatible CPU, executes around 1.5MIPS at 20MHz (clock for clock, about 30% faster), and thats in a power hungry Bipolar process, so the RISC translation isn’t terrible for most uses.

NASA Aeronomy of Ice in the Mesosphere – Camera powered by RISC

By today’s standards, even of space based processors, the UT69R000 is a bit underpowered, but it still has found wide use in space applications.  Not as a main processor, but as a support processor, usually supporting equipment that needs to be always on, and always ready.  One of the more famous mission the UT69R000 served on was powering the twin uplink computers for the DAWN asteroid mission (which only this year ended).  It was also used on various instrumentation on the now retired Space Shuttles. The CPU also powered the camera system on the (also retired) Earth Observing-1 Satellite, taking stellar pictures of our planet for 16 years from 2000-2017.  Another user is the NASA AIM satellite that explores clouds at the edge of space, originally designed to last a couple years, its mission which started in 2007 is still going.  The

JAXA/ESA Hinode SOLAR-B Observatory

cameras providing the pretty pictures are powered by the UT69R000.  A JAXA/ESA mission known as SOLAR-B/Hinode is also still flying and running a Sun observing telescope powered by the little RISC processor.

There are many many more missions and uses of the UT69R000, finding them all is a bit tricky, as rarely does a processor like this get any of the press, its almost always the Command/Data Processor, these days things like the BAE RAD750, and LEON SPARC processors, but for many things in space, and on Earth, 16-bits its all the RISC you need.

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January 24th, 2019 ~ by admin

Intel Everest Goes to Auction

Last summer we wrote about the Intel Everest series of high end CPU’s.  These are processors which Intel makes for very specific customers (in this case High Frequency stock trading).  They often have very little official information about them, and are sold at prices around $20,000 each. The latest in the series is the Intel Core i9-9990XE, with a max Turbo Frequency of 5.1GHz.  According to Anandtech, these will be auctioned off to the highest bidder.  These chips are a 14-core processor dissipating 255W, so will require rather good cooling, motherboard and Power Supply Support.  The chips will be auctioned to ‘select OEM’s’ once per quarter throughout 2019.  Intel isn’t likely deliberately making these chips scarce to increase the price, they are rather very rare speed bins for chips to attain.  Out of thousands of chip’s tested, only a few will pass screening at this level of performance.  These typically come from the center of a wafer (defects typically increase towards the edge of a wafer).  It will be interesting to see what prices these attain, but then again, we may never know.

January 18th, 2019 ~ by admin

Part 4: Mini-Mainframe at Home: Benchmarks and Overclocking

Part 4 of the Story of a 6-CPU Server from 1997.  In this final section we will first explore (briefly) the theory of running a 6-CPU SMP system (with processors designed for 2 or 4 way) and then move to benchmark the system and overclock it.

For the background of the ALR 6×6 and Pentium Pro processors that form the basis of this project please see:

Previous Parts of the Series

Part 1: Mini-Mainframe at Home – Introduction
Part 2: Mini-Mainframe at Home: Installing a Modern OS
Part 3: Mini-Mainframe at Home: The ALR 6×6 Hardware and BIOS

Features of the architecture and operation of the six CPU

So, as the server was originally shipped with six Pentium Pro “Black” processors, I decided to add six Pentium Pro “Gold” processors with a frequency of 200 MHz and a 256 KB L2 cache for contrast. Such a volume is just four times smaller, and at the same time it will be interesting to check the effect of the cache in such a volume: six megabytes versus one and a half.  But before starting the tests, I will focus on the principle of interaction of six processors in this system. To overcome the limitations of Intel on building a system with more than four processors, ALR engineers with the support of Unisys suggested using an inter-processor interaction scheme using arbitration:

The theory behind this architecture is as simple as it is powerful. Inside new six-way systems are two Tri-6 CPU cards, A and B (Figure 1). Each of these cards is an independent, three processor ready SMP bus, complete with all logic Active CPR processor protection, and auto-recovery technology built on each CPU card. These two Tri-6 CPU cards are then plugged into a 64-bit parity SMP bus. This design keeps the processors closely coupled, just like a parallel bus architecture, without the related heat and design problems. A separate four-way interleaved memory card is attached to the bus, supporting a sustained data bandwidth of 533-MB per second. This bandwidth is ample to support two full PCI buses as well as an EISA bus bridge.

To overcome the logical limitations of the Pentium Pro chip, six-way servers use a unique expanded bus arbitration configuration referred to as Dynamic Orchestration. The best way to understand how this system works is to compare it to a typical four-way SMP architecture. On a four-way system, bus arbitration is implemented in a “round robin” fashion. That is, each processor has equal rights to the bus, and access is handled in an orderly fashion. For example, if all processors needed access to the bus, CPU 0 would gain access first, followed by CPU 1, CPU 2, CPU 3, and then back to CPU 0. If CPU 2 was executing a cycle, and both CPU 3 and CPU 1 requested use of the bus, control would first pass to CPU 3, before cycling back to CPU 1.

For purposes of this four-way arbitration, processors are identified using the two-bit ID code. The six-way solution borrows this convention, with some important modifications. Within each Tri6 CPU card, individual processors are identified using the two-bit ID code. This yields four possible combinations, although only ID codes 0 through 2 are needed. A chip on each Tri6 card handles the arbitration, following the “round robin” scheme found in a four-way system. In this case, however, the fourth processor has been replaced by a sort of “phantom” processor that actually represents the other Tri6 card:

The figure above shows the six-processor scheme of the server board ALR Revolution 6×6 and its clones. Thanks to this approach, the appearance of 8, 10 and more processor systems has become possible.

Building a chessboard from various models of Pentium Pro, I thought that I could not find a larger processor. Even the 32-core AMD Threadripper 2990WX next to the Intel Pentium Pro does not seem so big.

However, The CPU Shack sent me this photo. On the left is the engineering version of the Xeon Gold 6142 on the LGA3647 socket, on the right another engineering version, but already the Intel Xeon’a Phi in the same LGA3647 version. As you can see, the story is back to square one and perhaps all subsequent processors will not be placed on the open palm of the hand. Although the processors in the performance of LGA2066 is still far from Intel Pentium Pro.

Overclocking 6 cores together and separately

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January 16th, 2019 ~ by admin

Part 3: Mini-Mainframe at Home: The ALR 6×6 Hardware and BIOS

Part 3 of The Story of a 6 CPU Server from 1997 – In this section we’ll learn about the hardware and BIOS that makes the ALR Revolution 6×6 with 6 Pentium Pro Processors work.

For the background of the ALR 6×6 and Pentium Pro processors that form the basis of this project please see:

Part 1: Mini-Mainframe at Home – Introduction
Part 2: Mini-Mainframe at Home: Installing a Modern OS

Exterior and Interior

The size of the case is quite large for the desktop (and it came with wheels, so probably not good  to have rolling about ones desk), but relatively compact for servers of this class. The height of the server is – 68 cm, width – 32 cm and depth – 58 cm. The weight of the server starts from 52 kg. I have a complete server kit, but the case is missing, because, due to its size and weight, the shipping to Belarus would be around $ 400, if not more, so the photos of the appearance were taken from the Internet.
Editor’s Note: The empty case is currently serving as a kitchen counter at the CPU Shack Museum.  Its really THAT big 

The first thing that catches the eye is the information touch! LCD display, the task of which is to display all the information about the status of the six processors, RAM, temperature, status of hard drives and other vital information. Today, such informative displays are the norm, but 21 years ago I even could not imagine that such a thing ever happened. The front of the case also has two compartments, the upper one under 5.25” devices, such as CD-ROM’s, the lower one opened access to the cage with SCSI drives. Behind you can see 14 expansion slots, a cooling system and a cage with power supplies.

To ensure the operation of  the server, two power supplies are needed, which are connected to a special board in the cage. The third power supply unit is a spare one in case of a single power supply failure. It is allowed to install four power supplies with the connection of two pairs to a pair of electrical outlets for complete duplication of all functions providing the server power.

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January 14th, 2019 ~ by admin

Part 2: Mini-Mainframe at Home: Installing a Modern OS

Part 2 of The Story of a 6 CPU Server from 1997 – In this section we’ll try to get a modern OS running on the ALR Revolution 6×6 with 6 Pentium Pro Processors.

For the background of the ALR 6×6 and Pentium Pro processors that form the basis of this project please see Part 1 of the project.

Part 2: Installing and Using an OS

Before you start installing the OS, you need to select the correct kernel of the operating system. To do this, at the initial stage of installation, press the F5 key.

In this case, we choose – MPS Multiprocessor PC, since the other options simply do not fit, since this server naturally does not support ACPI. In general, I will advise anyone who makes such experiments by choosing a more “modern” OS, which is older than the hardware itself – to turn off ACPI support in the BIOS (if present). This simple action will keep your nerves decent.

Windows Server 2003 R2 Enterprise Edition was installed and, as I wrote above, the system had one working CPU core.

Next, an attempt was made to install the operating system from the operating system itself using the update method, but at the initial stage the Windows Server 2003 Enterprise Edition installer warned me that a multiprocessor configuration not supported by the operating system was used.

But there are many ways to install the OS. Alternatively, I tried the OS “transfer method” with a known-workable SMP configuration. Taking the ASUS P2L97-DS motherboard on an Intel 440LX chipset with a pair of Intel Pentium-II with a frequency of 450 MHz, which should be deprived of a hardware error and chose the “MPS Multiprocessor PC” core, but the installation process did not start at the stage of copying the original files, reaching until installation on the hard disk. At this point, the system hung, not reaching the choice of the installation source. Much has been tried, loops, different drives and RAM, but all to no avail. At this point, a single Pentium-3 was also hanging on the Asus P3B-F motherboard (Intel 440BX chipset).

In the end, I decided to take another board with two SLOT 1 connectors – Asus P2B-D (Intel 440BX chipset) and a pair of Intel Pentium-III. OS Windows Server 2003 R2 Enterprise Edition was safely installed, it remains to transfer it to a six-processor server. As a result, having moved the necessary hard drive, I decided to do the first boot in “safe mode” in order to exclude the influence of different devices of both systems on each other, but as a result I received a BSOD.

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January 12th, 2019 ~ by admin

Part 1: Mini-Mainframe at Home: The Story of a 6-CPU Server from 1997


This article/project is provided in cooperation with guest author max1024, hailing from Belarus. I have provided some minor edits/tweaks in the translation from Belarusian to English.

As part of this project, you will have a unique opportunity to learn about a mini mainframe worth more than a Ferrari, which had enormous power by the standards of 1997, as well as the intricacies of installing a more modern operating system on it and other interesting details. I think that to some readers, the bold name of the super server ALR Revolution 6×6 already says something, and it will be discussed in this article.

Pentium Pro Processor versions – Minus the Overdrive

Alone, it would be simply not realistic for me to translate everything I had planned, without the help of my comrades from the United States, Russia and Great Britain, this project would have remained a project on paper, but their invaluable help would make it possible for the planned and almost forty kilograms of net weight (nearly 90lbs) to go a long way, more than 11 thousand kilometers (6800 miles) for three separate packages. The total distance as a result of which all the parts came together was 30 thousand kilometers (18,000 miles)  – for reference, the circumference of the Earth is 40 thousand km. (~25,000 miles)),  So this work is partly their merit, for which I am immensely grateful.

Editors Note: This ALR 6×6 came from the CPU Shack Museum, having sat in my house for some years. While chatting to Maksim last year he mentioned he would like to find one, so it was clearly meant to be.  You can’t just ship an ALR 6×6 across the world to Belarus, at least not economically, so over several months I disassembled the entire server and shipped it in pieces to a mutual friend in Russia, who then forwarded it to Maksim in Belarus.

Connor Krukosky and his IBM z890

Before embarking on the initial part of the project, I’ll tell you that trying to understand Mainframes and supercomputers  , I realized one thing that it’s quite possible to assemble even a “mini” mainframe at home, as Connor Krukosky did, but also overclocking would be even more interesting.

Studying such computational supermachines, I decided to dwell on systems consisting of Pentium Pro processors, so by installing Windows compatible applications and benchmarks, one could see how much the performance went ahead over the decades. Ideally, of course, it would be nice to get Intel ASCI Red, but I decided to start with its mini version.

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December 29th, 2018 ~ by admin

The End is Near (of the year) – A Look Back at Y2K

AMD Y2Kids Career Day – K6-2 Custom Painted 

Think back 19 years, the year is 1999 and in just a few days the world is apparently coming to an end due to programmers of the 60’s and 70’s deciding to save precious memory and use 2-digits for the year instead of 4.  Or perhaps they just assumed that in 30-40 years we really wouldn’t be using the same systems. Either way the world (and by world we mean mainly the media) was prepared to go dark as everything technology driven ground to a halt as the clocks struck midnight.  Kids pondered if this would mean an extended holiday break, while parents wondered if they would still have a job, or money in their computer controlled checking account.

Thankfully (though perhaps looking back that is becoming murky to some) it was a complete non-even, life, and technology continued at a record pace. And who would want to miss it? The GHz war between AMD and Intel was neck and neck at the turn of the millennium, with AMD set to win it by a few days.  This was the age of the Pentium 3, the Athlon and the K6-2.  Technology was glamorous and some of its downsides seen today were relegated to sci fi movies.  AMD and other companies held job fairs to acquire new talent, and also hosted Career Days for younger kids to see what went on in the exciting tech industry.  This specially painted AMD K6-2 CPU was likely handed out during such an event, probably either in Austin, TX (where AMD had a large fab) or Santa Clara, CA.  Its a NTK made package with a AMD package # 26351, the standard from 1998-2000 and used for most all late K6-2 CPUs. The child who likely would have received this, probably a middle schooler at the time would now be around 30, who knows how such an event affected them but it would be neat if they ended up working at AMD (or Globalfoundries) or at the very least sing an AMD powered computer.

November 20th, 2018 ~ by admin

The CPU Shack Museum Goes to SC18 in Texas

Well, at least some of our processors did.  SC18 was the 30th annual International Conference for High Performance Computing, Networking, Storage, and Analysis, held in Dallas, TX.  Being as this was the 30th anniversary, organizers wanted to provide a look back over the past 30 years of the conference, as well as the past 30 years of High Performance Computing.  Earlier this year CPU Shack published an article covering a large amount of this history of Supercomputers.  The SC18 exhibit had an actual Cray-1B Supercomputer and many other interesting relics.  The CPU Shack Museum loaned a variety of processors, from a Processor Node from an Intel Paragon Super Computer, to POWER and SPARC processors, and even a GRAPE-6 processor.

Here are a few images of the conference.  The first two images (681 and 683) show the entrance area, entrance signage, the Cray-1B, and some of the display cabinets and diagrams on the wall above the cabinets showing year-by-year SCinet configurations.

SC18 Entrance w/ Display Cabinets

The Cray-1B was one of the first things the over 13,000 attendees got to see.

Cray-1B on the right

In the display cases were many vintage items from past conferences, as well as an assortment of processors.

SC18 Display Case: Spot the POWER, SPARCs,, GRAPE, and even a BlueGene compute node

The displays and processors generated many conversations, questions, and reminisces. There was over 350 exhibits from companies and Universities around the world.  The CPU Shack Museum is happy to have been able to help in a small way.

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